4 HIGH SPEED SAMPLING AND HIGH SPEED ADCs , Walt Kester

High-Speed and Low-Power Flash ADCs Encoder

This paper presents a high-speed, low-power and low area encoder for implementation of flash ADCs. Key technique for design of this encoder is performed by convert the conventional 1-of-N thermometer code to 2-of-M codes (M = ¾ N). The proposed encoder is composed from two-stage; in the first stage, thermometer code are converted to 2-of-M codes by used 2-input AND and 4-i...

Calibration of sampling clock skew in high-speed, high-resolution time-interleaved ADCs

The design of high-speed pipelined analog-to-digital converters using voltage-mode sampling and current mode processing techniques

It is known that analog-to-digital converters (ADCs) play an important role in mixed-signal integrated systems. Under the rapid progress of semiconductor technology with device scaling, great impacts have been imposed on the design mixed-signal integrated circuits and systems to achieve high-speed and/or low-power performance. Especially, the high-speed ADCs are required in many modern integrat...

ADC Captures 1Gsps - AN642

One of the industry's first ultra high-speed, 8-bit data converters with highest AC performance and a GHz input bandwidth, the MAX104/6/8 family of data converters offers both sampling speed and signal bandwidth for applications where these parameters are of the utmost importance. At their introduction in 1999, this family of high-speed analog-todigital converters (ADCs) set a new standard for ...

A 50MS/s 9.9mW pipelined ADC with 58dB SNDR in 0.18µm CMOS using capacitive charge-pumps

In the interest of extending battery life in mobile systems that use pipelined ADCs, several power-efficient pipelined ADCs have recently been proposed. The most promising topologies reported thus far are those that substitute the opamp, which is the largest consumer of power in pipelined ADCs, with alternative and more power-efficient circuits. However, opamp-less pipelined ADCs thus far eithe...